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JPlace: A Clock-Aware Length-Matching Placement for Rapid Single-Flux-Quantum Circuits

DLPlace: A Delay-Line Clocking-Based Placement Framework for AQFP Circuits

Addressing the pressing need for energy-efficient computing technologies, innovations such as Josephson junctions-based superconducting logic circuits, particularly the Adiabatic Quantum-Flux-Parametron (AQFP) logic, have sparked increased research …

Exact Logic Synthesis for Reversible Quantum-Flux-Parametron Logic

Reversible computing, deriving its inspiration from Landauer's principle, has captured significant interest as a promising technology for logic operations without energy dissipation. The reversible quantum-flux-parametron (RQFP) stands as the first …

JRouter: A Multi-Terminal Hierarchical Length-Matching Router under Planar Manhattan Routing Model for RSFQ Circuits

Superconducting rapid single-flux-quantum (RSFQ) logic has shown great potential for high-energy-efficient computing systems. To ensure correct operations at ultra-high frequencies, it is necessary to incorporate length-matching constraints into the …

BOMIG: A Majority Logic Synthesis Framework for AQFP Logic

A Global Optimization Algorithm for Buffer and Splitter Insertion in Adiabatic Quantum-Flux-Parametron Circuits

As a highly energy-efficient application of low-temperature superconductivity, the adiabatic quantum-flux-parametron (AQFP) logic circuit has characteristics of extremely low-power consumption, making it an attractive candidate for extremely …

Equivalence Checking for Superconducting RSFQ Logic Circuits

Equivalence checking is a key component of the verification methodology for digital circuit designs. In this paper, we propose an equivalence checking framework for superconducting rapid single-flux-quantum (RSFQ) logic circuits which include acyclic …

Design Automation Methodology from RTL to Gate-Level Netlist and Schematic for RSFQ Logic Circuits

The superconducting rapid single flux quantum (RSFQ) logic circuit has the characteristics of high speed and low power consumption, making it an attractive candidate for future supercomputers. However, computer-aided design (CAD) tools for CMOS …